1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 124 125 126 127 128 129 130 131 132 133 134 135 136 137 138 139 140 141 142 143 144 145 146 147 148 149 150 151 152 153 154 155 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170 171 172 173 174 175 176 177 178 179 180 181 182 183 184 185 186 187 188 189 190 191 192 193 194 195 196 197 198 199 200
| /** s3c2410-adc.c * * S3C2410 ADC * exclusive with s3c2410-ts.c * * Author: SeonKon Choi <bushi@mizi.com> * Date : $Date: 2003/01/20 14:24:49 $ * * $Revision: 1.1.2.6 $ * 2004-6-14 add a device by threewater<threewater@up-tech.com> Fri Dec 03 2002 SeonKon Choi <bushi@mizi.com>- initial * 2011-05-16 modified this file for 2.6.30.2 kernel by Late Lee<latelee@163.com> * This file is subject to the terms and conditions of the GNU General Public * License. See the file COPYING in the main directory of this archive * for more details. */ /*#include <linux/config.h>*/ #include <linux/module.h> #include <linux/kernel.h> #include <linux/init.h>#include <linux/sched.h> /*#include <linux/irq.h>*/ #include <linux/delay.h> /*#include <asm/hardware.h>*/ #include <linux/semaphore.h> /*#include <asm/uaccess.h>*/ #include <linux/fs.h> /* file_operations */ #include <linux/interrupt.h> /* request_irq */ #include <linux/uaccess.h> #include <linux/cdev.h> #include <linux/clk.h> /* clk_get */ #include <asm/io.h> /* ioremap */ #include <mach/regs-clock.h> #include <plat/regs-adc.h> /* S3C2410_ADCCON etc */ #include "s3c2410-adc.h" #ifdef DEBUG /* I define it in Makefile */ /* KERN_INFO */ #define DPRINTK(fmt, ...) printk(KERN_DEBUG fmt, ##__VA_ARGS__) #else #define DPRINTK(fmt, ...) #endif #define DEVICE_NAME "adc" #define ADCRAW_MINOR 1 static int adcMajor = 0; /* auto */ static int adcMinor = 0; static int adc_nr_devs = 3; /* 3 for testing */ static void __iomem *base_addr; static struct clk *adc_clock; #define ADCCON (*(volatile unsigned long *)(base_addr + S3C2410_ADCCON)) //ADC control #define ADCTSC (*(volatile unsigned long *)(base_addr + S3C2410_ADCTSC)) //ADC touch screen control #define ADCDLY (*(volatile unsigned long *)(base_addr + S3C2410_ADCDLY)) //ADC start or Interval Delay #define ADCDAT0 (*(volatile unsigned long *)(base_addr + S3C2410_ADCDAT0)) //ADC conversion data 0 #define ADCDAT1 (*(volatile unsigned long *)(base_addr + S3C2410_ADCDAT1)) //ADC conversion data 1 #define ADCUPDN (*(volatile unsigned long *)(base_addr + 0x14)) //Stylus Up/Down interrupt status #define PRESCALE_DIS (0 << 14) #define PRESCALE_EN (1 << 14) #define PRSCVL(x) ((x) << 6) #define ADC_INPUT(x) ((x) << 3) #define ADC_START (1 << 0) #define ADC_ENDCVT (1 << 15) #define START_ADC_AIN(ch, prescale) do{ ADCCON = PRESCALE_EN | PRSCVL(prescale) | ADC_INPUT((ch)) ; ADCCON |= ADC_START;} while(0) typedef struct { struct semaphore lock; wait_queue_head_t wait; int channel; int prescale; }ADC_DEV; static ADC_DEV adcdev; static struct cdev adc_cdev; //DECLARE_MUTEX(ADC_LOCK); static irqreturn_t adcdone_int_handler(int irq, void *dev_id, struct pt_regs *reg) { wake_up(&adcdev.wait); return IRQ_HANDLED; } static ssize_t s3c2410_adc_write(struct file *file, const char *buffer, size_t count, loff_t * ppos) { int data; if(count!=sizeof(data)){ //error input data size DPRINTK("the size of input data must be %d\n", sizeof(data)); return 0; } if ( copy_from_user(&data, buffer, count) ) return -EFAULT; // by me adcdev.channel=ADC_WRITE_GETCH(data); /* get the channel */ adcdev.prescale=ADC_WRITE_GETPRE(data); /* get the prescale */ DPRINTK("set adc channel=%d, prescale=0x%x\n", adcdev.channel, adcdev.prescale); return count; } static ssize_t s3c2410_adc_read(struct file *filp, char *buffer, size_t count, loff_t *ppos) { int ret = 0; if (down_interruptible(&adcdev.lock)) return -ERESTARTSYS; START_ADC_AIN(adcdev.channel, adcdev.prescale); interruptible_sleep_on(&adcdev.wait); ret = ADCDAT0; ret &= 0x3ff; DPRINTK("AIN[%d] = 0x%04x, %d\n", adcdev.channel, ret, ADCCON & 0x80 ? 1:0); if ( copy_to_user(buffer, (char *)&ret, sizeof(ret)) ) return -EFAULT; // by me up(&adcdev.lock); return sizeof(ret); } static int s3c2410_adc_open(struct inode *inode, struct file *filp) { init_MUTEX(&adcdev.lock); init_waitqueue_head(&(adcdev.wait)); adcdev.channel=0; adcdev.prescale=0xff; //MOD_INC_USE_COUNT; DPRINTK( "adc opened\n"); return 0; } static int s3c2410_adc_release(struct inode *inode, struct file *filp) { //MOD_DEC_USE_COUNT; DPRINTK( "adc closed\n"); return 0; } static struct file_operations s3c2410_fops = { .owner = THIS_MODULE, .open = s3c2410_adc_open, .read = s3c2410_adc_read, .write = s3c2410_adc_write, .release = s3c2410_adc_release, }; int __init s3c2410_adc_init(void) { int ret; dev_t devno = 0; devno = MKDEV(adcMajor, adcMinor); base_addr=ioremap(S3C2410_PA_ADC,0x20); if (base_addr == NULL) { printk(KERN_ERR "failed to remap register block\n"); return -ENOMEM; } /* test: ioremap: c4876000(kernel space) ADCCON: 3fc4 */ /* another test: ioremap: c48ee000 ADCCON: 3fc4 */ DPRINTK("ioremap: %x ADCCON: %x\n", (unsigned int)base_addr, (unsigned int)ADCCON); adc_clock = clk_get(NULL, "adc"); if (!adc_clock) { printk(KERN_ERR "failed to get adc clock source\n"); return -ENOENT; } clk_enable(adc_clock); /* normal ADC */ ADCTSC = 0; //XP_PST(NOP_MODE); //ret = request_irq(IRQ_ADC_DONE, adcdone_int_handler, SA_INTERRUPT, DEVICE_NAME, NULL); ret = request_irq(IRQ_ADC, adcdone_int_handler, IRQF_SHARED, DEVICE_NAME, &adcdev); if (ret) { // return ret; return -EAGAIN; } //ret = register_chrdev(0, DEVICE_NAME, &s3c2410_fops); if (adcMajor) { ret = register_chrdev_region(devno, adc_nr_devs, DEVICE_NAME); } else { ret = alloc_chrdev_region(&devno, adcMinor, adc_nr_devs, DEVICE_NAME); adcMajor = MAJOR(devno); } if (ret < 0) { printk(DEVICE_NAME " can't get major number\n"); return ret; } //adcMajor=ret; cdev_init(&adc_cdev, &s3c2410_fops); /* init */ adc_cdev.owner = THIS_MODULE; ret = cdev_add(&adc_cdev, devno, adc_nr_devs); if (ret < 0) { printk(KERN_ERR "failed to add adc"); return ret; } DPRINTK("init adc ok, major:%d\n", adcMajor); printk (DEVICE_NAME"tinitialized\n"); return 0; } void __exit s3c2410_adc_exit(void) { //unregister_chrdev(adcMajor, DEVICE_NAME); //free_irq(IRQ_ADC_DONE, NULL); free_irq(IRQ_ADC, &adcdev); iounmap(base_addr); if (adc_clock) { clk_disable(adc_clock); clk_put(adc_clock); adc_clock = NULL; } cdev_del(&adc_cdev); unregister_chrdev_region(MKDEV(adcMajor, adcMinor), adc_nr_devs); DPRINTK("exit adc ok\n"); } module_init(s3c2410_adc_init); module_exit(s3c2410_adc_exit); MODULE_LICENSE("GPL"); MODULE_AUTHOR("Chiangchin Li");
|